Background and example embodiments of the present invention will be described using the context of processors and semiconductor layering arrangements, but practice of the present invention and a scope of the appended claims are not limited thereto.
High-speed systems require a corresponding high level of signal integrity to achieve performance requirements. A greater transmission bandwidth may be necessary for these systems than for less robust systems, so as to satisfy greater input/output (I/O) requirements. The current design of substrates used in high-performance processor systems does not facilitate an advantageous signal path which can result in maximal signal integrity.
As system frequency increases (e.g., from 533 MHz to 2.5 Gigabits/second) to meet performance demands, the effects of signal path deficiencies become more pervasive. Needed are arrangements to increase signal integrity in the signal paths.